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Register Combiners

In order to gain explicit control over per-fragment computation, Nvidia provides the register combiners extension [11]. With this extension enabled, the standard OpenGL texture environment is completely bypassed and substituted by a register-based unit. This unit consist of eight extremely flexible general combiner stages (Figure 2) and one final combiner stage.

Figure 2: A general combiner stage supports arbitrary register mappings and complex arithmetic computations.
\includegraphics[]{D:/Studium/Per-Pixel-Lighting/text_cescg/image/RegisterCombiner1.eps}
In a register combiner per-fragment information is stored in a set of input registers. The contents of these registers can be arbitrarily mapped to the four variables A, B, C and D. After combining these variables, e.g. by dot product ($ A\cdot B$), the results are scaled and biased and finally written to arbitrary output registers. The output registers of the first combiner stage are then the input registers for the next stage. An additional feature is, that fixed point color components, which are usually clamped to a range of [0, 1] can internally be expanded to a signed range [-1,1]. This allows vector components to be stored in the color registers without the need to scale and bias them. The resulting fragment output from the final combiner stage is processed with the standard OpenGL per-fragment operations, like depth test or alpha-blending.


next up previous
Next: Implementation Up: Hardware Architecture Previous: Texture Shader
Gerald Schröcker 2002-03-21